NPTEL Computer Architecture Week 12 Assignment Answers 2024
1. If a resource is accessed at some point in time, then resources located close to it are likely to be accessed soon after. This pattern is an example of ______________.
- Temporal locality
- Spatial locality
- Stack distance
- Address Distance
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2. Misses that occur due to the limited amount of associativity in a set-associative cache are known as ____.
- Conflict misses
- Compulsory misses
- Capacity misses
- None of the options.
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3. The address presented to the memory system after address translation is known as the ____________.
- Physical address
- Virtual address
- Page address
- Disk address
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4. Which cache replacement policy is based on the idea that the block brought into the cache at the earliest point of time is the least likely to be accessed in the future?
- Least Recently Used (LRU)
- First-In-First-Out (FIFO)
- Least Frequently Used (LFU)
- Random
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5. A cache has the following parameters in a 32-bit system: The size of the cache is N (in bytes), its associativity is K, and the block size is B (in bytes). What is the size of the tag in a set-associative cache?
- 32 – log2(N) + log2(K)
- 32 + log2(N) – log2(K)
- log2(N) – log2(B) – log2(K)
- None of the options.
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6. A block of memory in the physical address space and in the virtual address space is known as _______ and ___________, respectively.
- Frame, Page
- Page, Frame
- Line, Page
- Block, Line
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7. TLB stands for ___________.
- Translation lookaside block
- Translation lookaside buffer
- Translation level block
- Page table
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8. Which of the following is false?
- A page table is a mapping table that maps the address of each page to an address of a frame.
- Each process has its own page table.
- A page fault occurs whenever a page is not found in swap space.
- A TLB speeds up translations.
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9. Which of the following is not true about cache memory?
- Faster than DRAM
- Volatile memory
- Smaller in size than DRAM
- Sequential access memory
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10. Which of the following is an effective solution for capacity misses?
- Write buffer
- Small and simple cache
- Victim cache
- Large cache size
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