NPTEL Computer Architecture Week 4 Assignment Answers 2024
1. Consider the following ARM assembly instruction.
ldr r1, [r0]
If the value obtained from the address stored in r0 is v, then we need to fetch the bytes from _________ to _______________ from memory and save them in r1.
- v to v+4
- v to v+3
- v+1 to v+4
- None of the options
Answer :- For Answer Click Here
2. In the ARM ISA, we have a/an ___________ bit to specify if the return address needs to be saved or not for branch instructions.
- L (Link)
- S (Status)
- I (Instruction)
- None of the options
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3. The x86 ISA has _ floating-point registers and the register __________ is always the top of the stack.
- 8, st0
- 8, st7
- 16, st0
- 16, st7
Answer :-
4. In the ARM ISA, the effective memory address is computed after updating the base address in the ____________ addressing mode (with auto update).
- pre-indexed
- post-indexed
- register-indirect
- None of the options
Answer :-
5. In the x86 processor, the local descriptor table (LDT) is typically local to a _______.
- process
- program
- user
- None of the options
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6. In the x86 ISA, the fixed offset used while specifying the effective address of a memory operand, is known as the ________.
- displacement
- scaled index
- base address
- None of the options
Answer :-
7. The x86 ISA is a _____________ ISA.
- CISC
- RISC
- VLIW
- None of the options
Answer :-
8. In the x86 ISA, if the memory operand of an instruction is of the form [eax + ecx*2], then the addressing mode is ____________.
- base-scaled-index
- base-scaled-index-offset
- base-offset
- None of the options
Answer :- For Answer Click Here
9. Which of the following statements is incorrect for the x86 ISA?
- Both the operands can be a register
- At most one of the operands can be a memory location
- Both the operands can be an immediate value
- None of the options
Answer :-
10. In the ARM ISA, the bl instruction saves the return address into the ___________ register.
- lr
- sp
- fp
- ip
Answer :- For Answer Click Here
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